Current integrated circuits (ICs), such as digital signal processor (DSP) based superchips, often contain many circuits, including both digital logic circuits as well as analog circuits, which may operate with different power supply constraints. For example, a DSP engine of an IC may operate between different logic level voltages than memory, input/output interfaces, or other digital signal processing sections. Also, for some digital circuits it may be desirable to select DSP supply voltage to optimize performance for specific applications or operating conditions. For example, one might increase supply voltage to increase DSP processing rate, or in other situations reduce supply voltage to conserve power when less processing capability is required. To accommodate various power supply combinations, logic level shifters are required to couple signals reliably between the circuits with different supplies. Such a circuit is described, for example, in U.S. Pat. No. 5,272,389 to A. Hatada.
For a case where logic levels are translated from a low supply voltage (VDDL) to a high supply voltage (VDDH) and in circuits which share a common ground level (VSS), without a level shifting circuit (a "level shifter") a logic high from the VDDL side may drive a gate on the VDDH side to a mid-range voltage, resulting in an indeterminate logic state and high current consumption. Another problem encountered for such a case may be increasing switching speed while preventing latch-up during power-up of the circuit. For this case where the circuit translates from a low to high voltages, a comparator may be used with transistors to limit voltages at some circuit nodes while also limiting the voltage across transistors during switching to improve reliability. Such a circuit is described, for example, in U.S. Pat. No. 5,321,324 to Hardee et al.
For a case where logic levels are translated from a high supply voltage to a lower voltage, special logic level conversion circuits may not be required, if both circuits share a common ground potential. For this case, the logic-high output from the high-voltage circuit should also be more than sufficient to drive the low-voltage gate to saturation.
However, for a more general case where one supply may be either higher or lower than the other, level shifters are required which work well under a combination of conditions. An example of this situation might be a DSP superchip for which the analog sections require a 2.7 volt supply, while the DSP may be operated at any voltage from 1.8 to 5 volts. For clock or data-path signals, it is usually important that the level shifter maintain reasonable balance between rise and fall delays and that delays be relatively short. Timing requirements for control signals are usually less stringent, but reliability is still paramount. However, many level conversion circuits employ complex biasing of the transistor stages to accomplish reliable operation, such as the circuit described in U.S. Pat. No. 5,479,116 to Sallaerts et al., with the disadvantages of increased complexity and increased use of valuable IC real estate.
Therefore, there is a need for a level conversion circuit which translates from a low voltage to a high voltage as well as translating from the high voltage to the low voltage. In addition, the level conversion circuit configuration should be simple and require minimal biasing for reliable operation.